1. Field of the Invention
The present invention relates generally to a semiconductor integrated circuit. More particularly, the present invention relates to improvement of the structure of a semiconductor integrated circuit of the laminated type.
2. Description of the Related Art
A conventional semiconductor integrated circuit is generally constructed such that a single semiconductor is produced using a single silicon chip. Since the modern semiconductor technology is limitatively employed for forming a pattern on a silicon chip by irradiating electron beam, X-rays or the like, it is practically difficult to produce a semiconductor integrated circuit in excess of a level of ultra-large scale integrated circuit based on the modern semiconductor technology.
As is well known for any expert in the art, a variety of development works have been currently conducted to producing a semiconductor integrated circuit in the three-dimensional configuration but this technical concept of producing a semiconductor integrated circuit in the three-dimensional configuration can not be employed for a mass production system. Since a number of semiconductor integrated circuits can be subjected to soldering at a time on the assumption that the foregoing technical concept is practically realized on the mass production basis, any type of conventional soldering device can be employed as it is. This leads to the result that the foregoing technical concept can be applied to a mass production system without any particular problem. However, there is left unsolved a problem that the conventional semiconductor integrated circuit has a small circuit capacity because it is produced using a single silicon chip corresponding to a single semiconductor integrated circuit.